Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication procedures to form various features and multiple levels of the semiconductor devices. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
Semiconductor devices may develop defects during the fabrication procedures. Inspection procedures are performed at various steps during a semiconductor manufacturing process to detect defects on a specimen. Inspection procedures are an important part of fabricating semiconductor devices such as integrated circuits, becoming even more important to successfully manufacture acceptable semiconductor devices as the dimensions of semiconductor devices decrease. For instance, detection of defects has become highly desirable as the dimensions of semiconductor devices decrease, as even relatively small defects may cause unwanted aberrations in the semiconductor devices.
One method of defect detection includes checking one or more patterns of review (POR) with one or more procedures, including the Hierarchical and Local Automatic Thresholding (HLAT) and Fast Adaptive Segmented Thresholding (FAST) procedures. The HLAT procedure is highly sensitive and includes multiple non-default (i.e., tunable) operation parameters (e.g., system noise, wafer noise, pattern noise, and the like). As a result, the HLAT procedure is difficult to tune, and is user-dependent.
In contrast, the FAST procedure includes only a single non-default (i.e., tunable) operation parameter and so is quickly tuned, but is of lower sensitivity than the HLAT procedure. Additionally, the FAST procedure may include a sensitivity gap as opposed to the HLAT procedure or a broadband plasma (BBP) inspection system.
Both the HLAT and FAST procedures require a number of ideal-scenario assumptions to be made about the one or more wafers being inspected. For example, both the HLAT and FAST procedures assume that the noise distribution in one or more dies of the one or more wafers is the same. By way of another example, both the HLAT and FAST procedures use a common noise threshold parameter for the one or more dies. By way of another example, both the HLAT and FAST procedure use a common noise threshold parameter for both bright noise and dark noise defects. It is noted herein that both the HLAT and FAST include a dark defect factor for both algorithms to detune dark defects; however, the dark defect factor cannot detect dark defects if the factor is below a bright noise threshold. Real-world scenarios, however, may include uneven noise distributions, uneven bright noise distributions, and/or uneven dark noise distributions. For example, dies adjacent to a particular die on a wafer may include color variation. By way of another example, the one or more dies may have one or more weak signal defects buried underneath one or more stronger signal defects. By way of another example, the one or more dies may be dominated by bright noise and/or dark noise.
The FAST procedure requires an additional ideal-scenario assumption that bright noise and dark noise follow a Gaussian distribution (e.g., Gaussian mean and standard deviation distribution levels) scheme in all three die. Real-world scenarios, however, may include color variation in the adjacent dies to a particular die that prevents bright noise and dark noise from following Gaussian distribution curves.
As such, applying ideal-scenario assumptions to real-world scenarios often results in missing defects of interest (DOI) and a high nuisance rate during wafer inspection and review. Therefore, it would be desirable to provide a system and method that cures the shortcomings of the previous approaches as identified above.